1. Field of the Invention
The present invention relates to a multi-layer wiring substrate and, more particularly, to a multi-layer wiring substrate suitable for mounting thereon semiconductive elements and the like which operate at a high speed and generate a large amount of heat.
2. Description of the Related Art
Recently, high speed operations are required not only for super computers, but also for general computers. For this requirement, conventional devices such as a CMOS, which serve as a semiconductive element (LSI and the like), have been improved to operate at a high speed. At the same time, new devices represented by an ECL or GaAs have also been developed. In order that these very high speed elements operate at their inherent high speeds, a wiring substrate of a new structure or new mounting system is required. As means for satisfying such requirements, the following multi-layer wiring substrate has been developed. This multi-layer wiring substrate is formed integrally with a thin-film multi-layer wiring part wherein insulative layers of, e.g., polyimide resin and conductive patterns of copper type are alternately laminated on a predetermined surface of a Si substrate or multi-layer ceramic wiring substrate. In this multi-layer wiring substrate, a high speed semiconductive element is mounted on a die pad provided on the surface of the thin-film multi-layer wiring part and it is electrically connected to the thin-film multi-layer wiring part. Further, the thin-film multi-layer wiring part or semiconductive element are integrally sealed and secured by, e.g., a metal cap to be packaged. In the above-mentioned multi-layer wiring substrate, polyimide resin, whose dielectric constant is as small as about 3, is used as an insulating layer of the thin-film multi-layer wiring part. As a result, the propagation delay time of signals can be reduced and a circuit formed by using the multi-layer wiring substrate can operate at a high speed with the excellent properties.
However, the above multi-layer wiring substrate has the following problems. Namely, a multi-layer wiring substrate, on which a very high speed element such as a CMOS is mounted, is demanded to have further excellent electric property for high speed signals, and further preferable heat dissipation property for large heat generation. A structure of a thin-film multi-layer wiring with polyimide resin type insulating layers and copper type conductive pattern layers is proposed for the demand of high speed signals. A structure that a heat radiating fin is disposed on the back surface of a package is proposed for the demand of the heat dissipation property. However, the above structure of the multi-layer wiring substrate or mounting structure cannot sufficiently dissipate heat generated during operations at high speeds. That is, a very high speed element such as a CMOS generates heat of about several tens of W during high speed operations. On the other hand, the thickness of 10 to 30 .mu.m per layer is required for a polyimide resin type insulating layer, which constitutes a thin-film multi-layer wiring, to reduce the capacity of a signal line and to control the characteristic impedance. In the case of a multi-layer wiring substrate, the total thickness exceeds 100 .mu.m. Since the thermal conductivity of polyimide resin is low, the thermal resistance becomes large. Accordingly, heat generated during high speed operations of the very high speed element is not sufficiently dissipated, resulting in that the inherent functions of the very high speed element cannot be effected.
Further, a metal column (thermal via), which is arranged from a die pad through a multi-layer wiring layer to a substrate so as to promote heat dissipation during operations of an element, has been investigated. However, this cannot provide sufficient effects in dissipating heat generated during high speed operations of the very high speed element.